186 lines
6.6 KiB
C
186 lines
6.6 KiB
C
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/* -------------------------------------------------------------------------------------------------- */
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/* The LongMynd receiver: stv6120_regs.h */
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/* Copyright 2019 Heather Lomond */
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/* -------------------------------------------------------------------------------------------------- */
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/*
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This file is part of longmynd.
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Longmynd is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Longmynd is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with longmynd. If not, see <https://www.gnu.org/licenses/>.
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*/
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#ifndef STV6120_REGS_H
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#define STV6120_REGS_H
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/* common registers toboth tuners */
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#define STV6120_CTRL1 0x00
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#define STV6120_CTRL1_K_SHIFT 3
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#define STV6120_CTRL1_K_MASK 0xf8
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#define STV6120_CTRL1_RDIV_SHIFT 2
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#define STV6120_CTRL1_OSHAPE_SHIFT 1
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#define STV6120_CTRL1_OSHAPE_SINE 0
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#define STV6120_CTRL1_OSHAPE_SQUARE 1
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#define STV6120_CTRL1_MCLKDIV_SHIFT 0
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#define STV6120_CTRL1_MCLKDIV_2 0
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#define STV6120_CTRL1_MCLKDIV_4 1
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#define STV6120_CTRL2 0x01
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#define STV6120_CTRL2_DCLOOPOFF_SHIFT 7
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#define STV6120_CTRL2_DCLOOPOFF_ENABLE 0
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#define STV6120_CTRL2_DCLOOPOFF_DISABLE 1
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#define STV6120_CTRL2_SDOFF_SHIFT 6
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#define STV6120_CTRL2_SDOFF_OFF 0
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#define STV6120_CTRL2_SDOFF_ON 1
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#define STV6120_CTRL2_SYN_SHIFT 5
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#define STV6120_CTRL2_SYN_OFF 0
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#define STV6120_CTRL2_SYN_ON 1
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#define STV6120_CTRL2_REFOUTSEL_SHIFT 4
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#define STV6120_CTRL2_REFOUTSEL_VCC_DIV_2 0
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#define STV6120_CTRL2_REFOUTSEL_1_25V 1
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#define STV6120_CTRL2_BBGAIN_SHIFT 0
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#define STV6120_CTRL2_BBGAIN_0DB 0x0
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#define STV6120_CTRL2_BBGAIN_2DB 0x1
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#define STV6120_CTRL2_BBGAIN_4DB 0x2
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#define STV6120_CTRL2_BBGAIN_6DB 0x3
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#define STV6120_CTRL2_BBGAIN_8DB 0x4
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#define STV6120_CTRL2_BBGAIN_10DB 0x5
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#define STV6120_CTRL2_BBGAIN_12DB 0x6
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#define STV6120_CTRL2_BBGAIN_14DB 0x7
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#define STV6120_CTRL2_BBGAIN_16DB 0x8
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/* registers for tuner 1 */
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#define STV6120_CTRL3 0x02
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#define STV6120_CTRL4 0x03
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#define STV6120_CTRL4_F_6_0_SHIFT 1
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#define STV6120_CTRL4_F_6_0_MASK 0xfe
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#define STV6120_CTRL4_N_9_SHIFT 0
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#define STV6120_CTRL5 0x04
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#define STV6120_CTRL6 0x05
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#define STV6120_CTRL6_ICP_SHIFT 4
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#define STV6120_CTRL6_ICP_MASK 0x70
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#define STV6120_CTRL6_ICP_300UA 0
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#define STV6120_CTRL6_ICP_325UA 1
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#define STV6120_CTRL6_ICP_360UA 2
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#define STV6120_CTRL6_ICP_400UA 3
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/* note 400uA has 2 definitions */
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#define STV6120_CTRL6_ICP_400UA_2 4
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#define STV6120_CTRL6_ICP_450UA 5
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#define STV6120_CTRL6_ICP_525UA 6
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#define STV6120_CTRL6_ICP_600UA 7
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#define STV6120_CTRL6_F_17_15_SHIFT 0
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#define STV6120_CTRL6_F_17_15_MASK 0x07
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#define STV6120_CTRL6_RESERVED 0x08
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#define STV6120_CTRL7 0x06
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#define STV6120_CTRL7_RCCLKOFF_SHIFT 7
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#define STV6120_CTRL7_RCCLKOFF_ENABLE 0
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#define STV6120_CTRL7_RCCLKOFF_DISABLE 1
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#define STV6120_CTRL7_PDIV_SHIFT 5
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#define STV6120_CTRL7_CF_SHIFT 0
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#define STV6120_CTRL7_CF_5MHZ 0x00
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#define STV6120_CTRL8 0x07
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#define STV6120_CTRL8_TCAL_SHIFT 6
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#define STV6120_CTRL8_TCAL_MASK 0xc0
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#define STV6120_CTRL8_TCAL_DIV_1 0
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#define STV6120_CTRL8_TCAL_DIV_2 1
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#define STV6120_CTRL8_TCAL_DIV_4 2
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#define STV6120_CTRL8_TCAL_DIV_8 3
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#define STV6120_CTRL8_CALTIME_SHIFT 5
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#define STV6120_CTRL8_CALTIME_500US 0
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#define STV6120_CTRL8_CALTIME_1MS 1
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#define STV6120_CTRL8_CFHF_SHIFT 0
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#define STV6120_CTRL8_CFHF_MASK 0x1f
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#define STV6120_STAT1 0x08
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#define STV6120_STAT1_CALVCOSTRT_SHIFT 2
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#define STV6120_STAT1_CALVCOSTRT_FINISHED 0
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#define STV6120_STAT1_CALVCOSTRT_START 1
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#define STV6120_STAT1_CALRCSTRT_SHIFT 1
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#define STV6120_STAT1_CALRCSTRT_FINISHED 0
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#define STV6120_STAT1_CALRCSTRT_START 1
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#define STV6120_STAT1_LOCK_SHIFT 0
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#define STV6120_STAT1_LOCK_NOT_IN_LOCK 0
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#define STV6120_STAT1_LOCK_LOCKED 1
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#define STV6120_STAT1_RESERVED 0x08
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/* refsel fields for both tuners and path select */
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#define STV6120_CTRL9 0x09
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#define STV6120_CTRL9_RFSEL_2_SHIFT 2
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#define STV6120_CTRL9_RFSEL_2_MASK 0x0c
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#define STV6120_CTRL9_RFSEL_RFA_IN 0
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#define STV6120_CTRL9_RFSEL_RFB_IN 1
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#define STV6120_CTRL9_RFSEL_RFC_IN 2
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#define STV6120_CTRL9_RFSEL_RFD_IN 3
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#define STV6120_CTRL9_RFSEL_1_SHIFT 0
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#define STV6120_CTRL9_RFSEL_1_MASK 0x03
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#define STV6120_CTRL9 0x09
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#define STV6120_CTRL9_RESERVED 0xf0
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/* path select for both tuners */
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#define STV6120_CTRL10 0x0a
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#define STV6120_CTRL10_DEFAULT 0xbf
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#define STV6120_CTRL10_ID_SHIFT 6
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#define STV6120_CTRL10_ID_MASK 0xc0
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#define STV6120_CTRL10_LNADON_SHIFT 5
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#define STV6120_CTRL10_LNACON_SHIFT 4
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#define STV6120_CTRL10_LNA_OFF 0
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#define STV6120_CTRL10_LNA_ON 1
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#define STV6120_CTRL10_LNABON_SHIFT 3
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#define STV6120_CTRL10_LNAAON_SHIFT 2
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#define STV6120_CTRL10_PATHON_2_SHIFT 1
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#define STV6120_CTRL10_PATH_OFF 0
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#define STV6120_CTRL10_PATH_ON 1
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#define STV6120_CTRL10_PATHON_1_SHIFT 0
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/* Regs CTRL11 to 18 and STAT2 are all Tuner2 regs */
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#define STV6120_CTRL11 0x0b
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#define STV6120_CTRL12 0x0c
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#define STV6120_CTRL13 0x0d
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#define STV6120_CTRL14 0x0e
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#define STV6120_CTRL15 0x0f
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#define STV6120_CTRL16 0x10
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#define STV6120_CTRL17 0x11
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#define STV6120_STAT2 0x12
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/* test registers */
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#define STV6120_CTRL18 0x13
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#define STV6120_CTRL18_DEFAULT 0x00
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#define STV6120_CTRL19 0x14
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#define STV6120_CTRL19_DEFAULT 0x00
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/* vco 1 amplfier and test */
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#define STV6120_CTRL20 0x15
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#define STV6120_CTRL20_VCOAMP_SHIFT 6
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#define STV6120_CTRL20_VCOAMP_MASK 0xc0
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#define STV6120_CTRL20_VCOAMP_AUTO 0
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#define STV6120_CTRL20_VCOAMP_LOW 1
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#define STV6120_CTRL20_VCOAMP_NORMAL 2
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#define STV6120_CTRL20_VCOAMP_VERY_LOW 3
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#define STV6120_CTRL20_RESERVED 0x0c
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/* test registers */
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#define STV6120_CTRL21 0x16
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#define STV6120_CTRL21_DEFAULT 0x00
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#define STV6120_CTRL22 0x17
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#define STV6120_CTRL22_DEFAULT 0x00
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/* vco 2 amplfier and test */
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#define STV6120_CTRL23 0x18
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#endif
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