UHSDR/UHSDR-active-devel/mchf-eclipse/support/MCHF.cfg

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2022-11-08 16:13:55 +01:00
# This is an MCHF board with a single STM32F407VGTx chip.
# Generated by System Workbench for STM32
source [find interface/stlink-v2.cfg]
#source [find interface/stlink-v2-1.cfg]
set WORKAREASIZE 0x20000
transport select "hla_swd"
source [find target/stm32f4x.cfg]
#source [find target/stm32f7x.cfg]
# use hardware reset, connect under reset
reset_config none