64 lines
2.4 KiB
C
64 lines
2.4 KiB
C
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/* -*- mode: c; tab-width: 4; indent-tabs-mode: t; c-basic-offset: 4; coding: utf-8 -*- */
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/************************************************************************************
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** **
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** mcHF QRP Transceiver **
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** K Atanassov - M0NKA 2014 **
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** **
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**---------------------------------------------------------------------------------**
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** **
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** File name: **
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** Description: **
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** Last Modified: **
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** Licence: GNU GPLv3 **
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************************************************************************************/
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#ifndef __MCHF_MCU_H
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#define __MCHF_MCU_H
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#include "uhsdr_board_config.h"
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typedef enum {
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CPU_NONE = 0,
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CPU_STM32F4 = 1,
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CPU_STM32F7 = 2,
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CPU_STM32H7 = 3,
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} mchf_cpu_t;
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inline mchf_cpu_t MchfHW_Cpu(void)
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{
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mchf_cpu_t retval = CPU_NONE;
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#if defined(STM32F4)
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retval = CPU_STM32F4;
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#elif defined(STM32F7)
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retval = CPU_STM32F7;
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#elif defined(STM32H7)
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retval = CPU_STM32H7;
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#endif
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return retval;
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}
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#define STM32_GetRevision() (*(uint16_t *) (UID_BASE + 2))
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#define STM32_GetSignature() ((*(uint16_t *) (DBGMCU_BASE)) & 0x0FFF)
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#define STM32_UUID ((uint32_t *)UID_BASE)
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#if defined(STM32F4) || defined(STM32F7)
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#define STM32_GetFlashSize() (*(uint16_t *) (FLASHSIZE_BASE))
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#elif defined(STM32H7)
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#define STM32_GetFlashSize() (FLASH_SIZE/1024)
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#define FLASHSIZE_BASE 0x1FF1E880
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#define SRAM2_BASE 0x38000000
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#endif
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#if defined(STM32H7)
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#define GPIO_SetBits(PORT,PINS) { (PORT)->BSRRL = (PINS); }
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#define GPIO_ResetBits(PORT,PINS) { (PORT)->BSRRH = (PINS); }
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#elif defined(STM32F7) || defined(STM32F4)
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#define GPIO_SetBits(PORT,PINS) { (PORT)->BSRR = (PINS); }
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#define GPIO_ResetBits(PORT,PINS) { (PORT)->BSRR = (PINS) << 16U; }
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#endif
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#define GPIO_ToggleBits(PORT,PINS) { (PORT)->ODR ^= (PINS); }
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#define GPIO_ReadInputDataBit(PORT,PINS) { ((PORT)->IDR = (PINS); }
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#endif
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